Difference:
CertTestBed
(11 vs. 12)
Revision 12
2008-07-10 -
AlessioGianelle
Line: 1 to 1
META TOPICPARENT
name="WebHome"
Pre Certification Testbed
Line: 9 to 9
HOSTNAME
TYPE
SO
SERVICE
State
Note
<-- -->
cream-15.pd.infn.it
Intel(R) Xeon(TM) CPU 2.40GHz. Ram: 2Gb
SL 4.6
UI + Cream CLI
patch 1780
&
patch 1790
&
patch 1830
&
patch 1838
& cream-precert repo
devel19.cnaf.infn.it
XEON 5110, 1.6 GHZ, dual core. Ram: 8Gb
SL 4.6
WMS
patch 1841
&
patch 1830
&
patch 1838
Added:
>
>
wms008.cnaf.infn.it
Intel(R) Xeon(R) CPU 2.66GHz, dual core. Ram: 6Gb
SL 4.6
WMS
patch 1841
&
patch 1830
&
patch 1838
devel17.cnaf.infn.it
XEON 5110, 1.6 GHZ, dual core. Ram: 8Gb
SLC 4.6
LB
patch 1803
cert-bdii-01.cnaf.infn.it
Intel(R) Xeon(TM) CPU 2.40GHz. Ram: 512Mb
SLC 4.5
BDII
Top BDII
Changed:
<
<
devel03.cnaf.infn.it
AMD Opteron(tm) Processor 250. Ram: 4Gb
SLC 4.6
Cream-CE
LSF - 2 WNs - 3 Queues
>
>
devel03.cnaf.infn.it
AMD Opteron(tm) Processor 250. Ram: 4Gb
SLC 4.6
Cream-CE
LSF - 2 WNs - 3 Queues
devel05.cnaf.infn.it
AMD Opteron(tm) Processor 250. Ram: 4Gb
SL 4.6
Cream-CE
TORQUE - 6 WNs - 2 Queues
Changed:
<
<
cream-04.pd.infn.it
Intel(R) Xeon(TM) CPU 3.00GHz. Ram: 2Gb
SLC 4.6
Cream-CE
LSF - 16 WNs - 2 Queues
>
>
cream-04.pd.infn.it
Intel(R) Xeon(TM) CPU 3.00GHz. Ram: 2Gb
SLC 4.6
Cream-CE
LSF - 16 WNs - 2 Queues
cream-12.pd.infn.it
Intel(R) Xeon(TM) CPU 2.40GHz. Ram: 2Gb
SL 4.6
Cream-CE
TORQUE - 15 WNs - 2 Queues
View topic
|
H
istory
:
r53
<
r52
<
r51
<
r50
|
More topic actions...
Copyright © 2008-2024 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki?
Send feedback